In a typical manufacturing process of a semiconductor device, a polysilicon layer may be used as an electrode that maybe fabricated through deposition and ion implantation processes. The ion implantation process may form doped polysilicon by implanting ions into deposited undoped polysilicon.
After the ion implantation process, a subsequent heat treatment process may be necessary, and may maximize a size of a grain and reduce sheet resistance. However, in a P+ polysilicon gate forming process, a subsequent heat treatment process may be performed, which may cause boron ions to spread to a gate electrode.
Referring to FIG. 1, according to the related art, a polysilicon layer in the vicinity of a gate oxide layer interface may maintain constant boron concentration. However, since boron in the vicinity of the gate oxide layer interface in the polysilicon layer may have a depth profile distribution of less than a prescribed concentration, and electrical property of a device may deteriorate due to poly depletion.
However, according to the related art as shown in FIG. 1, since a gate depth is narrow for a region “b” in which boron of more than certain concentration exists in the vicinity of the gate oxide layer interface, gate depletion may occur.
Further, according to the related art, since the boron ions may be introduced to the gate oxide layer through the subsequent heat treatment process, certain electrical characteristics may deteriorate.
Furthermore, according to the related art, when a gate structure is formed using the polysilicon, a performance of a transistor may be limited due to the gate depletion. For example, the performance of a PMOSFET transistor may be inferior to a NMOSFET transistor.